The present disclosure relates to a storage control device. More particularly, the disclosure relates to a storage control device controlling two storage blocks having different access times, a storage device, and a control method for controlling the storage control device.
In the past, some storage devices combined two storage blocks with different access times to constitute a high-capacity storage device having a reduced access time (latency). For example, a flash memory was used as one storage block with a relatively short access time (low latency), and a hard disk drive (HDD) was adopted as the other storage block with a relatively long access time (high latency). In another example, an NVRAM (non-volatile random access memory) was used as the low-latency storage block and a flash memory as the high-latency storage block. Where the storage blocks with different access times were combined, the low-latency storage block generally had a smaller capacity than the high-latency storage block because the low-latency storage block generally cost higher than the high-latency storage block per unit capacity.
Where data is to be written to the above storage device combining the storage blocks with different access times, the storage device needs to determine which of the storage blocks the data of interest is to be written to. With regard to determining the destination to which to write data, methods have been proposed to write data with high access frequency preferentially to the low-latency storage block (e.g., see Japanese Patent Laid-Open No. 2009-205335). The proposed methods are intended to reduce the access time of the entire storage device in retrieving data with high access frequency therefrom.